Monday, July 4, 2011

MIFARE (RFID card)


                                 
                                                 The MIFARE Classic RFID card is fundamentally just a memory storage device, where the memory is divided into segments and blocks with simple security mechanisms for access control. MIFARE is the NXP Semiconductors-owned trademark of a series of chips widely used in contactless smart cards and proximity cards.They are ASIC based and have limited computational power. Thanks to their reliability and low cost, those cards are widely used for electronic wallet, access control, corporate ID cards, transportation or stadium ticketing.

                                                  The MIFAR Classic Crypto algorithm is a highly cost efficient authentication and data encryption method. It has been designed for maximum performance while providing basic levels of data security. In combination with a sophisticated key diversification technique and appropriate system level security measures, this product can be used for reloadable time-based smart cards or stored-value fare collection concepts.The MIFARE Classic 1k offers 1024 bytes of data storage, split into 16 sectors; each sector is protected by two different keys, called A and B. They can be programmed for operations like reading, writing, increasing value blocks, etc.). MIFARE Classic 4k offers 4096 bytes split into forty sectors, of which 32 are same size as in the 1K with eight more that are quadruple size sectors. MIFARE Classic mini offers 320 bytes split into five sectors. For each of these card types, 16 bytes per sector are reserved for the keys and access conditions and can not normally be used for user data. Also, the very first 16 bytes contain the serial number of the card and certain other manufacturer data and are read only. That brings the net storage capacity of these cards down to 752 bytes for Classic 1k, 3440 bytes for Classic 4k, and 224 bytes for Mini.

                                              This wide range of chips offers varying degrees of functionality, performance, security and strength of encryption, so that system integrators can choose the appropriate solution in terms of chip security and back end system to address their requirements. MIFARE Classic provides a benchmark in cost competitiveness as well as proven contactless performance, while MIFARE Plus™ enables an optimal future-proof migration path when necessary. Both MIFARE Plus and our high-end product MIFARE DESFire™ EV1 offer strong AES encryption and are certified according to Common Criteria EAL 4+

MIFARE Plus :-   The MIFARE Plus features multiple levels of security, including Advanced Encryption Standard (AES) encryption, and an easy migration path from existing MIFARE Classic implementations.
Security is at the heart of MIFARE Plus, which is the only smart card IC of its class to offer strong AES encryption for authentication, integrity and confidentiality, based on a 128-bit key length. MIFARE Plus chips comprise a number of additional security features which, when used optimally in the infrastructure, provide a system that prevents individuals from being identified and tracked by others.These features are enabled through the support of secure Random Identifiers (RIDs) next to 7 Byte Unique Identifiers (UIDs). MIFARE Plus also offers an originality function, which improves verification of cards and enables active measures against emulators.The crypto architecture of MIFARE Plus was reviewed by multiple independent parties and the chip itself received Common Criteria certification EAL 4+. In its highest security level, MIFARE Plus is not using any part of the compromised Crypto1 algorithm which is utilized in MIFARE Classic.In order to speed up and ease the migration process for existing infrastructures based on MIFARE Classic, the MIFARE Plus chip on its lowest security level will be backwards compatible with MIFARE Classic.Cards using chips in this lowest security level can be switched to a higher security level after issuance. it cannot be switched back to a lower security level.The switch itself is protected by an AES key that shall be different for each card, so switching to a higher level cannot be done unless this AES-secured key is known.

MIFARE DESFire:- Taking advantage of the extremely secure and standardised triple-DES( Data Encryption Standard) crypto method, MIFARE DESFire is designated for growing and open intermodal transport schemes. In combination with the MIFARE DESFire SAM (Secure Application Module in the terminal / reader), MIFARE DESFire provides highest levels of performance and security in both cards as well as in the infrastructure along with simple key handling.

SmartMX:As the first smart card controller platform of its kind, the SmartMX™ portfolio incorporates three interface options as an integral part of a highly secure smart card controller portfolio – ISO/IEC 7816 Contact Interface, ISO/IEC 14443A Contactless Interface and USB 2.0 LS Interface.

MIFARE Ultralight:- MIFARE Ultralight enables users to benefit from non-reloadable limited-use tickets through the appropriate usage of the One-Time-Programmable (OTP) memory area in combination with the ISO Unique IDentifier (UID) on a secure infrastructure. Additionally, MIFARE Ultralight offers maximum flexibility to realise time-based tickets (e.g. single-day tickets), zone-based tickets, multiple-ride tickets (e.g. 10-trip tickets) or even single-ride tickets.



                               

         
       


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Monday, November 3, 2008

ARM11 Family Features:

Powerful ARMv6 instruction set architecture
ARM Thumb instruction set reduces memory bandwidth and size requirements by up to 35%
ARM Jazelle technology for efficient embedded Java execution
ARM DSP extensions
SIMD (Single Instruction Multiple Data) media processing extensions deliver up to 2x performance for video processing
ARM TrustZone technology for on-chip security foundation (ARM1176JZ-S and ARM1176JZF-S cores)
Thumb-2 core technology for enhanced performance, energy efficiency and code density (ARM1156T2-S and ARM1156T2F-S cores)
Low power consumption:
0.6mW/MHz (0.13┬Ám, 1.2V) including cache controllers
Energy saving power-down modes address static leakage currents in advanced processes
Intelligent Energy Manager (IEM) technology for dynamic power management (ARM1176JZ-S and ARM1176JZF-S cores)

High performance integer processor

8-stage integer pipeline delivers high clock frequency (9 stages for ARM1156T2(F)-S)
Separate load-store and arithmetic pipelines
Branch Prediction and Return Stack
High performance memory system design
Supports 4-64k cache sizes
Optional tightly coupled memories with DMA for multi-media applications
High-performance 64-bit memory system speeds data access for media processing and networking applications
ARMv6 memory system architecture accelerates OS context-switch
Vectored interrupt interface and low-interrupt-latency mode speeds interrupt response and real-time performance
Optional Vector Floating Point coprocessor (ARM1136JF-S, ARM1176JZF-S and ARM1156T2F-S cores) for automotive/industrial controls and 3D graphics acceleration
All ARM11 cores are delivered as ARM- Synopsys Reference Methodology compliant deliverables which significantly reduce the time to generate a specific technology implementation of the core and to generate a complete set of industry standard views and models.
For a full list of public ARM11 processor licensees, click here

Related Links
White Paper - The ARMv6 Microarchitecture(PDF 199KB)
White Paper - ARM11 Core and PrimeXsys Platform(PDF 159KB)



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